A typical SoC (System-on-Chip) design project involves tens of engineers and costs anywhere between $10 – 20 M. Such designs combine an array of disparate blocks or subsystems, usually called Cores or IPs (Intellectual Properties). The design process involves the integration of these multiple-vendor IPs on a single piece of silicon while satisfying multiple conflicting objectives e.g. performance, cost, and power consumption. Logic Design, Physical Design, and Test are three distinct, but heavily interacting, phases of the SoC design process.
The objective of this two-day course is to introduce the major SoC logical and physical design challenges and the integration of these two design types to achieve the best performance and power consumption trade-offs.
In Part I, we present the major logical design steps including specification, simulation, synthesis, formal verification, timing analysis, and power analysis and optimization. The leading techniques used for implementing these steps in real designs and dependencies and interactions among these steps will be presented as well. The role of HDLs(Hardware Description Languages) in facilitating the integration of these design steps will be emphasized.
In Part II of this course, we focus on the Physical Design process. This includes the floor-planning, placement, and routing. These are the three major steps used to create the chip layout. Interaction among these steps and logic synthesis and simulation steps is a key for achieving the SoC design cost, performance, and power consumption goals. In addition, clocking distribution, post layout timing analysis, and signal integrity techniques will be covered.
Intended Audience:This course is intended for IC, ASIC, and system design engineers and managers who are interested in improving their skills in utilizing the leading logical and physical design techniques to achieve the most optimal design goals. Also, software and hardware developers, test and QA engineers and managers in development, test integration, QA, and manufacturing.
