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Testing Mixed-Signal System-on-Chip Designs |
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2 days
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Jacob El-Ziq
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The development of complex SoC (System on Chip) involves multiple deciplines including logical design, physical design, and test. The cost of test has been increasing rapidly and forming a major part of the overall system cost. An SoC consists of a large number of IPs. From test prospective, these IPs can be divided into three major types: RF, Digital, and Mixed-Signal. In this two day course, we will focus on practical and economical Mixed-Signal Test techniques and methodologies.
This two-day course starts by providing an overview of Mixed-Signal SoC testing with special emphasis on DSP designs. We will cover various Mixed-Signal test techniques including A/D, D/A, PLL, and Sampling testing. Mixed-Signal DFT and BIST techniques will be presented with emphasis on test economics. Finally, we will cover the most recent industrial techniques and examples of Leading state-of-the-art SoCs that use these techniques.
Intended Audience:This course is intended for SoC, and system design and test engineers and managers who are interested in improving their skills in getting a better understanding of the Mixed-Signal techniques to achieve the most economical system design and test goals. Also, software and hardware developers, test and QA engineers and managers involved in development, test integration, QA, and manufacturing of SoC products.
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Course Outline
Day 1
1. SoC Mixed-Signal Design Methodology Overview.
2. Mixed-Signal Test Fundamentals
3. A/D, D/A, PLL, and Sampling testing
4. Analog and Mixed-Signal Test Bus Standard.
Day 2
5. DFT Techniques for Mixed-Signal Designs.
6. BIST for Mixed-Signal Designs.
7. DSP-Based Testing
8. Advanced Mixed-Signal Test Techniques.
9. Testing Examples of State-of-the-Art Chips.
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